half adder

half adder
элк. полусумматор

English-Russian base dictionary . 2014.

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  • half-adder — halfˈ adder noun (computing) A circuit having two inputs and outputs, which can add two binary digits and give the sum and the carry digit • • • Main Entry: ↑half …   Useful english dictionary

  • Half Adder —   [engl.], Halbaddierer …   Universal-Lexikon

  • half adder — pussumatoris statusas T sritis automatika atitikmenys: angl. half adder; half adder; two input adder vok. Halbadder, m; Halbaddierer, m rus. полусумматор, m; сумматор по модулю 2, m pranc. additionneur à deux entrées, m …   Automatikos terminų žodynas

  • half-adder — pussumatoris statusas T sritis automatika atitikmenys: angl. half adder; half adder; two input adder vok. Halbadder, m; Halbaddierer, m rus. полусумматор, m; сумматор по модулю 2, m pranc. additionneur à deux entrées, m …   Automatikos terminų žodynas

  • half adder — noun A specific logical circuit that performs an addition operation on two bits …   Wiktionary

  • half-adder — /ˈhaf ædə/ (say hahf aduh) noun a circuit in a computer which performs part of the function of adding two numbers …  

  • Adder (electronics) — In electronics, an adder or summer is a digital circuit that performs addition of numbers.In modern computers adders reside in the arithmetic logic unit (ALU) where other operations are performed.Although adders can be constructed for many… …   Wikipedia

  • adder — adder1 /ad euhr/, n. 1. the common European viper, Vipera berus. 2. any of various other venomous or harmless snakes resembling the viper. [bef. 950; late ME; r. ME nadder (a nadder becoming an adder by misdivision; cf. APRON), OE naeddre; c. OS… …   Universalium

  • two-input adder — pussumatoris statusas T sritis automatika atitikmenys: angl. half adder; half adder; two input adder vok. Halbadder, m; Halbaddierer, m rus. полусумматор, m; сумматор по модулю 2, m pranc. additionneur à deux entrées, m …   Automatikos terminų žodynas

  • Brent-Kung adder — In electronics, an adder is a combinatorial or sequential logic element which computes the n bit sum of two n bit numbers. The Brent Kung adder is one of the more advanced designs, having a gate level depth of O(log 2(n)).Adding two n bit numbers …   Wikipedia

  • Dadda multiplier — basic principle known from manual multiplication Example of Dadda reduction o …   Wikipedia


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